Microelectronic imagers are used in digital cameras, wireless devices with picture capabilities, and many other applications. Cell phones and Personal Digital Assistants (PDAs), for example, are incorporating microelectronic imagers for capturing and sending pictures. The growth rate of microelectronic imagers has been steadily increasing as they become smaller and produce better images with higher pixel counts.
Microelectronic imagers include image sensors that use Charged Coupled Device (CCD) systems, Complementary Metal-Oxide Semiconductor (CMOS) systems, or other solid-state systems. CCD image sensors have been widely used in digital cameras and other applications. CMOS image sensors are also quickly becoming very popular because they are expected to have low production costs, high yields, and small sizes. CMOS image sensors can provide these advantages because they are manufactured using technology and equipment developed for fabricating semiconductor devices. CMOS image sensors, as well as CCD image sensors, are accordingly “packaged” to protect their delicate components and to provide external electrical contacts.
FIG. 1A is a partially schematic illustration of an imaging device 10 configured in accordance with the prior art. The imaging device 10 includes a die 20 having an integrated circuit 21 coupled to an image sensor 12. A color filter array (CFA) 13 is formed over the active pixels of the image sensor 12. The CFA 13 has individual filters or filter elements configured to allow the wavelengths of light corresponding to selected colors (e.g., red, green, or blue) to pass to each pixel of the image sensor 12. A plurality of microlenses 14 form a microlens array 15 that is positioned over the CFA 13. The microlenses 14 are used to focus light onto the initial charge accumulation regions of the image sensor pixels. A glass cover 16 is positioned to protect the microlens array 15 and other features of the die 20 from contamination. A device lens 17 is positioned a selected distance from the microlens array 15 to focus light onto the microlens array 15 and ultimately onto the image sensor 12.
The integrated circuit 21 of the die 20 can be electrically coupled to external devices via solder balls 11. The solder balls 11 are located on the side of the die 20 opposite from the image sensor 12 so as to avoid interference with the operation of the image sensor 12. Accordingly, the die 20 can include multiple through-wafer interconnects (TWIs) connected between the solder balls 11 and the bond pads 22, which are in turn connected to the integrated circuit 21. Each TWI can include a via that extends through the die 20, and an electrically conductive interconnect structure 30 located in the via.
FIG. 1B is an enlarged, cross-sectional view of an interconnect structure 30 configured in accordance with the prior art. The interconnect structure 30 includes a via 50 that extends through the bond pad 22 and through the die 20. A dielectric layer 31 electrically isolates the via 50 from other structures in the die 20, and a barrier layer 33 is positioned against the dielectric layer 31 to prevent migration of conductive materials away from the interconnect structure 30. A seed layer 34 and one or more conductive layers 37 (two are shown in FIG. 1B) are disposed on the barrier layer 33. These conductive layers can include materials such as copper and/or nickel. Nickel can be used as a second conductive layer to provide a barrier between a copper conductive layer and a volume of fill material 40. The fill material 40 typically includes solder.
One characteristic of the interconnect structure 30 is that the conductive layers 37 can have an uneven thickness. This is particularly so for interconnect structures having high aspect ratios (e.g., greater than 1:1). One drawback with this feature is that it may cause discontinuities in the electrical path between the bond pad 22 and the solder ball 11. Accordingly, the interconnect structure 30 may not always provide a reliable electrical connection between these two structures.
Another characteristic of the interconnect structure 30 is that the fill material 40 typically includes solder. The solder will only wet to a metal surface, and it will consume some of that surface during the wetting process. If the conductive layers 37 are nonexistent or so thin that they become consumed at the bottom of the via, then the solder fill material 40 may lose its adhesion to the sidewall in this region of the via. This in turn may result in a failure of the electrical path between the bond pad 22 and the solder ball 11.